Magnetic memories are devices storing a data as the direction of a spontaneous magnetization (hereinafter, simply referred to as “magnetization”) of a magnetic layer. Extensive research and development activities have been conducted for magnetic memories, since they are expected as non-volatile memories with high speed operation, large capacity and reduced power consumption. Most typically, a magnetic memory is configured to achieve data reading by using a magnetoresistance effect, such as a tunnel magnetoresistance effect (TMR effect) and a giant magnetoresistance effect (GMR). An element including two magnetic layers and a spacer layer disposed therebetween (hereinafter, referred to as “spin device element”) exhibits a resistance depending on the relative direction of the magnetizations of the two magnetic layers due to the magnetoresistance effect. Most typically, a spin device element is placed into the “low resistance” state when the magnetizations of the two magnetic layers are directed in “parallel” and placed into the “high resistance” state when the magnetizations of the two magnetic layers are directed in “antiparallel”. In a magnetic memory which incorporates a spin device element in each memory cell, data stored in each memory cell can be identified from the signal level of a voltage or current signal generated so as to depend on the resistance value of the spin device element.
FIG. 1 is a conceptual diagram illustrating an exemplary read operation of a magnetic memory. Discussed below is the case in which a spin device element is used as a memory cell 101 and the memory cell 101 can take two states: the “high resistance” state of a resistance value RHigh and the “low resistance” state of a resistance value RLow, where RHigh>RLow.
Most typically, a read current Isense is fed to the memory cell 101 when data reading from the memory cell 101 is performed. When the read current Isense flows through the memory cell 101, a read voltage Vmemory is generated across the memory cell 101. The read voltage Vmemory, which depends on the state of the memory cell 101, that is, the resistance value of the memory cell 101, can be used as a read signal obtained from the memory cell 101. It is possible to identify the data stored in the memory cell 101 by comparing the read voltage Vmemory generated across the memory cell 101 with a predetermined reference voltage Vref, for example, with a sense amplifier 102 and providing a value as the “OUTPUT” shown in FIG. 1. In detail, the data stored in the memory cell 101 can be identified by comparing the read voltage Vmemory with a reference voltage Vref adjusted between voltages VHigh and VLow where VHigh (=RHigh·Isense) is an expected value of the read voltage Vmemory for the high resistance state and VLow (=RLow·Isense) is an expected value of the read voltage Vmemory for the low resistance state. In the case when the “high resistance” state is associated with data “0” and the “low resistance” state is associated with data “1”, for example, the data stored in the memory cell 101 can be identified as data “0” if the read voltage Vmemory is higher than the reference voltage Vref and as data “1” if the read voltage Vmemory is lower than the reference voltage Vref.
In the above-described read operation, the effective signal window for data identification based on the read signal obtained from the memory cell 101 is the difference ΔV between the voltages VHigh and VLow. The data stored in the memory cell 101 can be identified more surely, as the signal window ΔV is increased.
Although the read voltage Vmemory dependent on the data stored in the memory cell 101 is obtained by feeding a given read current Isense through the memory cell 101 in the above-described operation, a read current dependent on the data stored in the memory cell 101 may be obtained in a read operation by applying a given read voltage across the memory cell 101. In this case, the effective signal window of the read signal obtained from a memory cell 101 is the difference between a current flowing through the memory cell 101 placed into the “low resistance” state and the current flowing through the memory cell 101 placed into the “high resistance” state.
One current issue of the magnetic memory is the insufficiency in the effective signal window of the read signal obtained from the memory cell. Read signals obtained from memory cells have a distribution due to variations in the resistance value of the spin device elements (that is, the memory cells) and variations in the interconnection resistance of long interconnections. In the meantime, the signal level of a reference signal (the reference voltages Vref obtained in the operation illustrated in FIG. 1) also have a distribution due to variations in the circuitry which generates the reference signal. FIG. 2 illustrates one example of the distributions in the signal levels of the read signals and the reference signal. FIG. 2 illustrates the distributions of the reference voltage Vref, the read voltage VHigh obtained as the read voltage Vmemory when the memory cell 101 is placed in the high-resistance state, and the read voltage VLow obtained as the read voltage Vmemory when the memory cell 101 is placed in the low-resistance state. The horizontal axis of the graph illustrated in FIG. 2 corresponds to the voltage V and the horizontal axis corresponds to the frequency N. As is understood from FIG. 2, an insufficient effective signal window of the read signal undesirably causes read errors due to the overlap of the distributions of the read voltage VLow and the reference voltage Vref and the overlap of the distributions of the read voltage VHigh and the reference voltage Vref.
It is preferable to sufficiently increase the MR (magnetoresistance) ratio of a spin device element incorporated in a memory cell for achieving a sufficient signal window, because the effective signal window of the read signal obtained from the memory cell depends on the MR ratio of the spin device element. The current technology, however, does not offer an MR ratio for obtaining a sufficient signal window. It is technologically difficult to achieve an increase in the MR ratio, because it requires a remarkable breakthrough in materials used in spin device elements.
Related art documents are listed in the following. U.S. Patent Application Publication No. 2013/0121066 A1 discloses the structure of a memory cell which includes four spin device elements. U.S. Pat. No. 6,424,562 B1 discloses read/write architecture for a magnetoresistive random access memory (MRAM). U.S. Patent Application Publication No. 2013/0272059 A1 discloses a differential MRAM structure.